The present disclosure relates to subject matter contained in priority Japanese Patent Application No. 2001-314210, filed on Oct. 11, 2001, the contents of which is herein expressly incorporated by reference in its entirety.
1. Field of the Invention
The present invention relates to a bare chip mounting method, as is represented by a flip-chip method for forming a bump on an electrode pad provided on a semiconductor wafer and directly bonding the bump and a circuit formation body such as a circuit substrate to each other without using a lead wiring, and to a bare chip mounting system.
2. Description of Related Art
Recently, there has been a demand for downsizing and weight-reduction in electronic equipment. In compliance with such a demand, a flip-chip mounting technique has been widely employed for the purpose of increasing an IC mount density on an electronic circuit; in the flip-chip mounting technique, bare chip type semiconductor integrated circuit chips (hereinafter, referred to simply as IC chips), which are obtained by dividing a wafer into individual chips, are directly mounted face down. As examples of products fabricated by the flip-chip mounting technique, a CSP (Chip Size Package) whose size is equal to an IC chip housed therein and an MCM (Multi Chip Module) for mounting a plurality of IC chips on a circuit substrate are given. The production amount of these products is in increase. An SBB (Stud Bump Bonding) technique, which is one of the flip-chip mounting techniques, applies a wire bonding technique to form bumps on electrode pads of each IC chip in a semiconductor wafer, so that the bumps and wiring electrodes formed on a circuit substrate are directly bonded to each other without through a lead wiring.
Along with advanced miniaturization of portable electronic equipment, the reduction in size as well as in thickness of the IC chip has been further encouraged. For this purpose, among bare chip mounting systems, there is a system having such a structure that allows bump bonding to be performed on a semiconductor wafer prior to dicing for dividing the semiconductor wafer into IC chips. Furthermore, in the case of a thin semiconductor wafer having a thickness of 0.2 mm or less, a carrier is used so as to perform the carriage without causing any damage such as crack, edge chipping, or breakdown of a circuit. This carrier has a structure, in which a sheet is provided in a tensioned state over a lower surface of a protection ring. A semiconductor wafer is carried while being attached to the sheet so as to be surrounded by the protection ring.
FIG. 6 is a flow chart showing a control process of a conventional flip-chip mounting technique. In FIG. 6, in pre-process equipment, after fabrication of a semiconductor wafer (step S1), the semiconductor wafer is carried to assembly process equipment and bumps are formed on the semiconductor wafer (step S2). The semiconductor wafer, on which the bumps are bonded, is carried to the pre-process equipment and is attached to a sheet of a carrier (step S3). Then, the semiconductor wafer is diced (step S4) and then is washed (step S5). Subsequently, the semiconductor wafer is returned to the assembly process equipment where IC chips fabricated by dicing the semiconductor wafer are flip-chip mounted onto a circuit substrate (step S6).
In the conventional bare chip mounting method, however, scraps are generated when the semiconductor wafer is diced after bump bonding. Although the semiconductor wafer is washed with pure water in a post-process, the scraps still partially remain in a connection part between a bump and an electrode of the circuit substrate. Thereby, when the IC chip fabricated by dicing the semiconductor wafer is flip-chip mounted onto the circuit substrate, poor electrical conduction may possibly occur between the IC chip and the circuit substrate due to the remaining scraps.
What is worse, after the semiconductor wafer, on which the bump-bonding is performed in the assembly process equipment, is temporarily carried to the pre-process equipment for dicing and washing, the semiconductor wafer is returned to the assembly process equipment so that the IC chips are flip-chip mounted onto the circuit substrate. A great loss in time as well as in effort is disadvantageously generated. This problem arises because a pure water supply device is generally absent in a clean room of the assembly process equipment in many cases whereas a pure water supply device is provided for a clean room of the pre-process equipment.
In light of the above-mentioned problems, the present invention has an object of providing a bare chip mounting method and a bare-chip mounting system, capable of preventing the poor electrical conduction from occurring between an IC chip and a circuit substrate due to scraps generated upon dicing of a semiconductor wafer and capable of reducing a loss in time as well as in effort.
In order to achieve the above object, a bare chip mounting method according to the present invention includes: a dicing step for dividing a semiconductor wafer into individual IC chips while the semiconductor wafer is being attached to a carrier; a washing step for washing the diced semiconductor wafer; a bump-bonding step for carrying the washed semiconductor wafer to an assembly process while the semiconductor wafer is being attached to the carrier so as to form a bump on an electrode pad of the semiconductor wafer; and a mounting step for mounting each of the IC chips, on which the bump is formed, onto a circuit formation body.
In this bare chip mounting method, prior to the bump bonding to the semiconductor wafer, the wafer is diced and the scraps generated by the dicing are removed by washing in a clean room of pre-process equipment. Then, the semiconductor wafer is carried from the pre-process equipment to assembly process equipment where the bump bonding is carried out. Since the scraps generated by the dicing do not adhere to the bump, poor electrical conduction between the IC chip and the circuit substrate due to the scraps does not occur. Moreover, since it is sufficient to carry the semiconductor wafer only once between the pre-process equipment and the assembly process equipment, a loss in time as well as in effort is reduced.
A bare chip mounting system according to the invention includes: a dicing device for dividing a semiconductor wafer into individual IC chips while the semiconductor wafer is being attached to a carrier; a washing device for washing the diced semiconductor wafer; a carrying device for carrying the washed semiconductor wafer to assembly process equipment while the semiconductor wafer is being attached to the carrier; a bonding head for forming a bump on an electrode pad of the semiconductor wafer; and a flip-chip bonder for mounting each of the IC chips, on which the bump is formed, onto a circuit formation body.
While novel features of the invention are set forth in the preceding, the invention, both as to organization and content, can be further understood and appreciated, along with other objects and features thereof, from the following detailed description and examples when taken in conjunction with the attached drawings.